Memory devices are typically provided as internal storage areas in the computer. The term memory identifies data storage that comes in the form of integrated circuit chips. In general, memory devices contain an array of memory cells for storing data, and row and column decoder circuits coupled to the array of memory cells for accessing the array of memory cells in response to an external address.
There are several different types of memory. One type is DRAM (dynamic random access memory). This is typically used as main memory in a computer environment. A DRAM memory cell is commonly configured as an access transistor coupled to a capacitor. A charge stored on the capacitor defines a data value of the memory cell. DRAM is generally volatile, which means that it requires a steady flow of electricity to maintain its contents. As soon as the power is turned off, whatever data was in DRAM is lost. However, it remains popular as it provides high memory density and quick access times.
Another type of memory is a non-volatile memory known as Flash memory. A flash memory is a type of EEPROM (electrically-erasable programmable read-only memory) that can be erased and reprogrammed in blocks. Many modern personal computers (PCs) have their BIOS stored on a flash memory chip so that it can easily be updated if necessary. Such a BIOS is sometimes called a flash BIOS. Flash memory is also popular in wireless electronic devices because it enables the manufacturer to support new communication protocols as they become standardized and to provide the ability to remotely upgrade the device for enhanced features.
A typical flash memory comprises a memory array that includes a large number of memory cells arranged in row and column fashion. Each of the memory cells includes a floating-gate field-effect transistor capable of holding a charge. The cells are usually grouped into blocks. Each of the cells within a block can be electrically programmed in a random basis by charging the floating gate. The charge can be removed from the floating gate by a block erase operation. The data in a cell is determined by the presence or absence of the charge in the floating gate.
Flash memory typically utilizes one of two basic architectures known as NOR flash and NAND flash. The designation is derived from the logic used to read the devices. In NOR flash architecture, a column of memory cells are coupled in parallel with each memory cell coupled to a bit line. In NAND flash architecture, a column of memory cells are coupled in series with only the first memory cell of the column coupled to a bit line.
Memory device fabricators, as well as other integrated circuit device fabricators, are continuously seeking to reduce the size of the devices. Smaller devices facilitate higher productivity and reduced power consumption. However, as device sizes become smaller, isolation within the devices becomes more critical. This is especially true in flash memory architecture because of the high voltages utilized on-chip.
Shallow trench isolation (STI) has been commonly used in semiconductor fabrication to provide field isolation. As devices are scaled ever smaller, and trenches become narrower, dielectric filling of the trenches becomes increasingly difficult. As a result, trench depth is often reduced to lower the aspect ratio of the trench, thereby making it easier to fill. However, field isolation between active areas in the periphery often requires that a certain trench depth be maintained.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternate methods of providing isolation within a semiconductor device.